The Toy-SRAM Project
TOY-SRAM
Robert Montoye
October 28 2021
Microprocessors use multiple high-speed multiport register files to improve their performance. In BOOM, the high-performance RISC V, the custom register file took as much design effort as the rest of the design. The TOY-SRAM, open-source, multi-port memory system is designed to replace custom circuit design with a simple set of choices for the fab and the system designer. For the chip fabrication facility, it offers a canonical specification that can be optimized for use in a wide variety of applications. The system designer can then select the desired fast, low voltage friendly multiport memory from a menu of choices. This talk will discuss plans on 130 nm 5LM silicon which eases prototyping into future fabs while making the 10T SRAM the high bandwidth voltage scalable memory cell and encouraging fabs on its density.