OpenPOWER Summit 2021

ANANTH Fabless SoC
2021-10-28, 13:00–13:45, RoomA

ANANTH is a type of Fabless SoC (System on Chip) designed and developed at VLSI labs, Electronics and Communication Engineering Department, JNTUA college of engineering, Anantapur, Under academic collaboration with Open Power foundation and International Business Machines (IBM) Inc. This is a fabless SoC built around IBM POWER A2O CORE and also has peripherals like AMBA AXI, SPI, I2C, ETHERNET, NAND, NOR, DMA, PCIe,DDR3. This is indigenously developed for academic R&D purposes.


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ANANTH is a type of Fabless SoC (System on Chip) designed and developed at VLSI labs, Electronics and Communication Engineering Department, JNTUA college of engineering, Anantapur, Under academic collaboration with Open Power foundation and International Business Machines (IBM) Inc. This is a fabless SoC built around IBM POWER A2O CORE and also has peripherals like AMBA AXI, SPI, I2C, ETHERNET, NAND, NOR, DMA, PCIe,DDR3. This is indigenously developed for academic R&D purposes.

Goal
1. To Design “ANANTH 1.0” - IBM Power Core based Fabless SoC (System on Chip) for Academic R & D at JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPUR COLLEGE OF ENGINEERING ANANTAPUR (JNTUACEA), ANANTAPUR
2. To develop a driver application for “ANANTH 1.0”- IBM Power Core based Fabless SoC (System on Chip)

Description

ANANTH is a type of Fabless SoC (System on Chip) designed and developed at VLSI labs, Electronics and Communication Engineering Department, JNTUA college of engineering, Anantapur, Under academic collaboration with Open Power foundation and International Business Machines (IBM) Inc. This is a fabless SoC built around IBM POWER A2O CORE and also has peripherals like AMBA AXI, SPI, I2C, ETHERNET, NAND, NOR, DMA, PCIe, DDR3

Research Scholar at JNTUA