OpenPOWER Summit 2021

SoC in Hours - A Power Chat
2021-10-28, 10:30–14:30, RoomD

SoC in Hours - A Power Chat
1. OpenPOWER - A matured ISA
2. Art of System Building - Its Libre-SoC
3. Microwatt in FPGA - A Rapid Flow
4. Tapeout Microwatt in a click
5. Bug the SoC - A Fire test


This is a tutorial to make a System on Chip in a few hours. This completely covers OpenPOWER based SOC design flow right from the OpenPOWER ISA to GDS II tapeout file generation, surprisingly within a few hours.
The additional feature is that this tutorial also covers testing of SoC, which most of the events less concentrate on.

I am an enthusiastic engineer with the aspiration of electronics engineering and Chip design. Currently conducting research on VLSI architecture for Domain Specific Applications at SASTRA University, India. Research interest includes Architecture development for computing platforms and System on Chip design. Exploring open source tools for chip making.

https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/